Search - fpga project

[Compress-Decompress algrithms] canbus(FPGA)

Description: 基于FPGA的can 总线设计，采用verilog语言编写。在FPGA的开发环境下，新建一个工程，然后将本文件中的各个源代码添加进工程里，即可运行仿真。-FPGA-based bus design can use verilog language. FPGA development environment, a new project, and then the paper all the source code to add the project, Simulation can be run.
Platform: | Size: 862208 | Author: 李浩 | Hits:

[Other resource] FPGA-digital-circuit-design

Description: < FPGA数字电子系统设计与开发实例导航> 一书的代码，FPGA数字电子系统设计与开发实例导航,用硬件描述语言编写的，I2C,UART,USB，VGA，CAN-BUS，网络等等的书籍配套原代码。。。。使用方法： 1.拷贝到硬盘。 2.用ISE创建项目，分别加入各个代码文件，即可。-<FPGA digital electronic systems design and development examples of navigation> a book code, FPGA digital electronic systems design and development examples of navigation, using hardware description languages, I2C, UART, USB, VGA, CAN-BUS, network books, etc. matching the original code. . . . Usage: 1. Copy to your hard disk. 2. With ISE to create the project, respectively, to the various code files, you can.
Platform: | Size: 1567744 | Author: 卢桂荣 | Hits:

[VHDL-FPGA-Verilog] FPGA-based_oscilloscope

Description: FPGA-based_oscilloscope,VHDL写的实现示波器的程序，及完整的工程描述文档-FPGA-based_oscilloscope. VHDL was oscilloscope to achieve the realization of the process, and complete the project description document
Platform: | Size: 228352 | Author: 严刚 | Hits:

[Software Engineering] 014_5_343

Description: viterbi decoder fpga project
Platform: | Size: 186368 | Author: | Hits:

[Technology Management] AD6_FPGA_project

Description: 基于Altium Designer6的FPGA项目设计图例教程,80页.图片虽模糊,但文字超清晰.-Based on Altium Designer6 Legend of the FPGA project design tutorials, 80. Although the fuzzy picture, but ultra-clear text.
Platform: | Size: 10719232 | Author: pc_repair | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: FPGA设计全流程：Modelsim>>Synplify.Pro>>ISE 第一章 Modelsim编译Xilinx库第二章调用Xilinx CORE-Generator 第三章使用Synplify.Pro综合HDL和内核第四章综合后的项目执行第五章不同类型结构的仿真-FPGA design of the whole process: Modelsim>> Synplify.Pro>> ISE Chapter ModelSim Xilinx compiler library chapter called Xilinx CORE-Generator Chapter III Synplify.Pro integrated use of Chapter IV of HDL and kernel integrated implementation of the project after the Chapter V structure of different types of simulation
Platform: | Size: 218112 | Author: 青岚之风 | Hits:

[Other] lcd1602

Description: FPGA工程文件通过FPGA在LCD上显示“this is my frist program"的字体已经验证，供大家学习使用。-FPGA through the FPGA project file in the LCD display
Platform: | Size: 630784 | Author: 马亮 | Hits:

[VHDL-FPGA-Verilog] altera_up_avalon_ps2

Description: 花了半个月才改好的Atera DE1/DE2 ps2 IP 驱动核。放在FPGA工程目录下可以直接使用。本IP能够驱动PS/2键盘和鼠标。使用时只要调用HAL目录下的文件即可以直接使用！-Spent a good two weeks we have made some changes Atera DE1/DE2 ps2 IP-driven nuclear. On the FPGA project directory can be used directly. The IP to drive PS/2 keyboard and mouse. When used as long as the call HAL directory file that can be used directly!
Platform: | Size: 27648 | Author: 王乔 | Hits:

[VHDL-FPGA-Verilog] USB20

Description: USB2_V例子工程是一个FPGA数据通过USB2.0传输到PC机的示例.-USB2_V example FPGA project is a data transmitted to the PC through the USB2.0 sample machine.
Platform: | Size: 379904 | Author: 王陶 | Hits:

[VHDL-FPGA-Verilog] Actel_Igloo_nano_UART

Description: This FPGA project include a simple version of the UART for Actel Igloo nano.
Platform: | Size: 453632 | Author: badfox | Hits:

[VHDL-FPGA-Verilog] fpga-dm9000a

Description: 一个项目工程，硬件包含XINLINX FPGA，配置FLASH，串口，SDRAM,与以太网芯片DM9000A，实现数据采集，以太网传输，电路验证完全正确，请放心使用，SPARTAN 3E 的BGA引脚320个，不容易布板，可以参考使用的。要FPGA实现网络通信也可以参考电路，B因为产品升级了所以公开原来的电路的。 -A project engineering, hardware contains XINLINX FPGA, configuration FLASH, serial port, SDRAM, and Ethernet chips DM9000A, data acquisition, Ethernet transmission, circuit verification is completely correct, please rest assured that the use of, SPARTAN 3E' s 320-pin BGA it is not easy layout, you can reference to use. To achieve network communication FPGA also can refer to the circuit, because the product upgrades so publicly.
Platform: | Size: 915456 | Author: rong | Hits:

[VHDL-FPGA-Verilog] lab3

Description: VHDL code for using LCD in an fpga project
Platform: | Size: 46080 | Author: Sara | Hits:

[VHDL-FPGA-Verilog] vga-connector_files

Description: vhdl code for using lcd in an fpga project
Platform: | Size: 229376 | Author: Sara | Hits:

[VHDL-FPGA-Verilog] gpsfpga

Description: gps design using fpga project thesis very useful
Platform: | Size: 377856 | Author: venkata | Hits:

[VHDL-FPGA-Verilog] FPGA_examples

Description: FPGA工程例子.verilog HDL语言编写；-FPGA project examples. Verilog HDL language
Platform: | Size: 3441664 | Author: 严成 | Hits:

[VHDL-FPGA-Verilog] Lab_4_PicoBlaze

Description: Integrating a picoblaze processor in LabVIEW FPGA by use of CLIP node. Create LabVIEW FPGA Project for Xilinx Spartan 3E starter board. use pBlazIDE to program a psm file that will run on the picoblaze softcore processor.
Platform: | Size: 1750016 | Author: gaansan | Hits:

[Other] FPGA

Description: FPGA算法教程经典! (其中包含加法器,乘极其算术逻辑部件设计) software engineering 软件工程-FPGA algorithm tutorial. Classic! (Which includes adder, an arithmetic logic unit designed to take the most) software engineering project software
Platform: | Size: 1019904 | Author: 米多 | Hits:

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